Field
This disclosure relates generally to non-volatile memories (NVMs) and device structures, and more particularly, to integrating NVM cells with device structures.
Related Art
Bypass capacitors are very critical on regulated voltage nodes (linear and switch capacitor) nodes and also on power supply nodes to filter the noise out of electrical circuits. In split gate NVM technologies, charge pump voltages can go as high 15 Volts and generally semiconductor technology nodes do not support devices/capacitors that operate at this voltage rating. Thus the amount of bypass capacitor that can be used in the technology nodes is limited. To get around this limitation, capacitors with a very low capacitance per unit area are formed in series, consuming valuable space in the area available in an integrated circuit. Thus, a solution for adding the required amount of capacitance while reducing the amount of space required in an integrated circuit is desired.
In addition, the integration of non-volatile memories (NVMs) with any other device structure has always been a challenge due to the different requirements for the NVM transistors, which store charge, and other device structures which are commonly intended for some other functions such as a capacitor. The need for storing charge has been addressed mostly with the use of floating gates but also with nanocrystals or nitride. In any of these cases, the need for this unique layer makes integration of the NVM transistors and the logic transistors difficult, particularly when using a split-gate structure for the NVM. The particular type of charge storage layer can also have a large effect on the options that are available in achieving the integration. Accordingly there is a need to provide an integration that improves upon one or more of the issues raised above.